In an existing heart rate detection circuit, a photodiode is generally used for receiving reflected light from human body, and then an integrator is utilized to convert an induced current of the photodiode into a voltage signal for subsequent processing. However, due to presence of ambient light, the integrator is usually saturated, which affects normal operation of the circuit. Therefore, a current sample-and-hold circuit needs to be introduced to offset a background photocurrent (i.e., the induced current generated by the photodiode due to receiving the ambient light) in the photodiode so as to prevent saturation of the integrator.
A conventional current sample-and-hold circuit is as shown in FIG. 1. In FIG. 1, a current output circuit in the current sample-and-hold circuit is formed by a P-channel Metal Oxide Semiconductor (PMOS) transistor M of a fixed size. The PMOS transistor M, in a sampling stage, is used for sampling the background photocurrent of the photodiode PD (i.e., the induced current of a photodiode PD, namely, a current of a variable current source IBG in FIG. 1) and converting the sampled current into a voltage of a capacitor CSH. In an integrating stage, the PMOS transistor M is used for conveying the previous sampled current to the photodiode PD so as to offset the background photocurrent of the photodiode.
In a case where an area of the photodiode PD remains unchanged, the background photocurrent of the photodiode PD increases as light intensity increases. In a case where the light intensity remains unchanged, the background photocurrent of the photodiode PD is in turn proportional to the area of the photodiode PD. Therefore, when the area of the photodiode PD remains unchanged and the light intensity changes within a large range, or when the light intensity remains unchanged and the area of the photodiode PD changes within a large range, the background photocurrent of the photodiode PD can be changed within a large range. When the background photocurrent of the photodiode PD is very large, a gate-to-source voltage of the PMOS transistor M can also become very large, and the voltage of the capacitor CSH is equal to the gate-to-source voltage of the PMOS transistor M and also becomes larger. When the voltage of the capacitor CSH becomes large, a reversed bias voltage of the photodiode PD becomes small. When the reversed bias voltage decreases to a certain degree, a working efficiency of the photodiode PD is greatly reduced. Therefore, in existing technologies, in order to ensure the working efficiency of the photodiode PD, the voltage of the capacitor CSH is avoided to become very large, that is, the background photocurrent of the photodiode PD is avoided to become very large. That is to say, the conventional current sample-and-hole circuit can only be used for offsetting a relatively small background photocurrent.